FIG. 1 illustrates a circuit configuration diagram of a conventional DC converter (PLT 1). This DC converter is composed of a half-bridge circuit, in which a series circuit including switching elements Q1 and Q2 consisting of MOSFETs is connected to both ends of a DC power supply Vin. A drain of the switching element Q2 is connected to a positive electrode of the DC power supply Vin and a source of the switching element Q1 is connected to a negative electrode of the DC power supply Vin.
Between the drain and source of the switching element Q1, a diode D1 and a voltage resonant capacitor Cry are connected in parallel. In addition, a reactor Lr1, a primary winding P1 of a transformer T1, and a current resonant capacitor Cri are connected in series. The reactor Lr1 is a leakage inductance between the primary and secondary sides of the transformer T1. The primary winding P1 is connected to a magnetizing inductance as an equivalent reactor Lp. Between a drain and a source of the switching element Q2, a diode D2 is connected in parallel.
A winding start of each winding of the transformer T1 is depicted as a dot. One end (dot side) of a secondary winding S1 of the transformer T1 is connected to an anode of a diode D3. The other end of the secondary winding S1 of the transformer T1 and one end (dot side) of a secondary winding S2 of the transformer T1 are connected to one end of a smoothing capacitor Co. The other end of the secondary winding S2 of the transformer T1 is connected to an anode of a diode D4. A cathode of the diode D3 and a cathode of the diode D4 are connected to another end of the capacitor Co. The both ends of the capacitor Co are connected to a load Ro.
A PFM controller 10 alternately turns on/off the switching elements Q1 and Q2 according to an output voltage Vo from the capacitor Co, thereby fixing an on-duty of the switching elements Q1 and Q2 so as to vary a frequency of the switching elements Q1 and Q2. Thus, PFM control (frequency control) is carried out so that the output voltage Vo from the capacitor Co is kept constant.
Next, operations of the conventional DC converter with the above-mentioned configuration will be explained with reference to a timing chart of signals of each part at rated load illustrated in FIG. 2.
In FIG. 2, VQ1 is a drain-source voltage of the switching element Q1, IQ1 is a drain current of the switching element Q1, VQ2 is a drain-source voltage of the switching element Q2, IQ2 is a drain current of the switching element Q2, VCri is a voltage between both ends of the current resonant capacitor Cri, VD3 is a voltage between both ends of the diode D3, ID3 is a current of the diode D3, VD4 is a voltage between both ends of the diode D4, and ID4 is a current of the diode D4.
Note that, there is a dead time during which the switching elements Q1 and Q2 are both off, and the switching elements Q1 and Q2 are alternately turned on and off.
In an interval between time t0 and time t1, the switching element Q2 is switched from on to off at time t0. In a state where the switching element Q2 is an on state, the primary side of the transformer T1 passes a current in a route along Vin->Q2->Lr1->Lp->Cri->Vin. Similarly, the secondary side of the transformer T1 passes a current in a route along Co->Ro->Co.
When the switching element Q2 is turned off, the current flowing the primary side of the transformer T1 is shifted from the switching element Q2 to the voltage resonant capacitor Crv, and passes in a route along Crv->Lr1->Lp->Cri->Crv.
As a result, the voltage resonant capacitor Crv, which substantially has the voltage of the DC power supply Vin in the state where the switching element Q2 is an on state, discharges to 0 V by turning off the switching element Q2 (hereinafter, the voltage of the DC power supply Vin is also represented by Vin).
Since the voltage of the voltage resonant capacitor Cry is equal to the voltage VQ1 of the switching element Q1, the voltage VQ1 of the switching element Q1 decreases from Vin to 0 V. In addition, the voltage VQ2 of the switching element Q2 is equal to (Vin−VQ1), and therefore, increases from 0 V to Vin.
In an interval from time t1 to time t2, the voltage of the voltage resonant capacitor Cry decreases to 0 V at time t1. Then, the diode D1 becomes conductive to pass a current in a route along D1->Lr1->Lp (P1)->Cri->D1. When the voltage of the secondary winding S2 of the transformer T1 reaches the output voltage Vo, the secondary side of the transformer T1 passes currents in a route along Co->Ro->Co and in a route along S2->D4->Co->S2. Also in the interval from time t1 to time t2, a gate signal to the switching element Q1 turns on, so that the switching element Q1 conducts a zero-voltage switching (ZVS) operation and a zero-current switching (ZCS) operation.
In an interval from time t2 to time t3, the switching element Q1 is an on state at time t2, so as to pass a current in a route along Cri->Lp (P1)->Lr1->Q1->Cri. Thus, the voltage VCri of the current resonant capacitor Cri decreases. In addition, the secondary side of the transformer T1 passes currents in a route along S2->D4->Co->S2 and in a route along Co->Ro->Co. The voltage of the secondary winding S2 is clamped at the output voltage Vo, and the voltage of the primary winding P1 is clamped at a voltage that the output voltage Vo is multiplied by a turn ratio of the transformer T1. Therefore, the primary side of the transformer T1 passes a resonant current produced by the reactor Lr1 and the current resonant capacitor Cri.
In an interval from time t3 to time t4, the voltage of the secondary winding S2 becomes lower than the output voltage Vo at time t3, and the current on the secondary side of the transformer T1 becomes zero. Thus, the secondary side of the transformer T1 passes a current in a route along Co->Ro->Co. Also, the primary side of the transformer T1 passes a current in a route along Cri->Lp->Lr1->Q1->Cri. In other words, the primary side of the transformer T1 passes a resonant current produced by the sum of the two reactors Lr1 and Lp (Lr1+Lp) and the current resonant capacitor Cri.
In an interval from time t4 to time t5, the switching element Q1 turns off at time t4. Then, the current flowing the primary side of the transformer T1 is shifted from the switching element Q1 to the voltage resonant capacitor Crv, thereby passing in a route along Lp->Lr1->Crv->Cri->Lp.
As a result, the voltage resonant capacitor Crv, which substantially has 0 V in the state where the switching element Q1 is an on state, is charged to Vin by turning off the switching element Q1. Since the voltage of the voltage resonant capacitor Cry is equal to the voltage VQ1 of the switching element Q1, the voltage VQ1 also increases from 0 V to Vin. In addition, the voltage VQ2 of the switching element Q2 is equal to (Vin−VQ1), and therefore, decreases from Vin to 0 V.
In an interval from time t5 to time t6, the voltage of the voltage resonant capacitor Cry increases to Vin at time t5. Then, the diode D2 becomes conductive to pass a current in a route along Lp (P1)->Lr1->D2->Vin->Cri->Lp (P1). Since the voltage of the secondary winding S1 of the transformer T1 reaches the output voltage Vo, the secondary side of the transformer T1 passes currents in a route along Co->Ro->Co and in a route along S1->D3->Co->S1. Also in the interval from time t5 to time t6, a gate signal of the switching element Q2 is turned on, so that the switching element Q2 conducts a zero-voltage switching operation and a zero-current switching operation.
In an interval from time t6 to time t7, the switching element Q2 is an on state at time t6 to pass a current in a route along Vin->Q2->Lr1->Lp (P1)->Cri->Vin. Thus, the voltage VCri of the current resonant capacitor Cri increases. In addition, the secondary side of the transformer T1 passes currents in a route along S1->D3->Co->S1 and in a route along Co->Ro->Co. The voltage of the secondary winding S1 is clamped at the output voltage Vo, and the voltage of the primary winding P1 is clamped at a voltage that the output voltage Vo is multiplied by a turn ratio of the transformer T1. Therefore, the primary side of the transformer T1 passes a resonant current produced by the reactor Lr1 and current resonant capacitor Cri.
In an interval from time t7 to time t8, the voltage of the secondary winding S1 becomes lower than the output voltage Vo at time t7. Thus, the secondary side of the transformer T1 passes a current in a route along Co->Ro->Co. Also, the primary side of the transformer T1 passes a current in a route along Vin->Q2->Lr1->Lp->Cri->Vin. In other words, the primary side of the transformer T1 passes a resonant current produced by the sum of the two reactors Lr1 and Lp (Lr1+Lp) and the current resonant capacitor Cri.
In this way, the conventional DC converter illustrated in FIG. 1 employs pulse signals having an on-duty configured to be approximately 50% so as to control the switching frequency of the switching elements Q1 and Q2. Therefore, the resonant current produced by the reactor Lr1, the reactor Lp, and the current resonant capacitor Cri is varied, thereby controlling the output voltage Vo. Namely, increasing the switching frequency results in decreasing the output voltage Vo.
FIG. 3 is a timing chart of signals of each part at no load. In FIG. 3, the load Ro is infinite. Currents ID3 and ID4 flowing in diodes D3 and D4, respectively, are the currents only to detect the output voltage Vo.
The frequency of the switching element at no load is calculated according to the following formula,
      [          Math      ⁢                          ⁢      1        ]                                f          =                                    1                              4                ·                                                      {                                                                  (                                                  Lp                          +                                                      Lr                            ⁢                                                                                                                  ⁢                            1                                                                          )                                            ·                      Cri                                        }                                                        1                    /                    2                                                  ·                                                      cos                                          -                      1                                                        ⁡                                      [                                                                                                                                                      V                              ⁢                              in                                                        ·                            Lp                            ·                                                          Ns                              /                                                                                                                                                                                                        {                                                                                                                                                                2                                    ·                                                                          (                                                                                                                        V                                          ⁢                                          o                                                                                +                                                                                  V                                          ⁢                                          f                                                                                                                    )                                                                        ·                                                                                                                                                                                                                                                                                                                  (                                                                                  Lp                                          +                                                                                      Lr                                            ⁢                                                                                                                                                                                  ⁢                                            1                                                                                                                          )                                                                            ·                                      N                                                                        ⁢                                                                                                                                                  ⁢                                    p                                                                                                                                                        }                                                                                                                ]                                                                        .                                                (          1          )                    
In the formula, Vf is a forward voltage of the diodes D3 and D4, Np is a number of turns of the primary winding P1 of the transformer T1, and Ns is a number of turns of the secondary winding S1 of the transformer T1.
However, the actual frequency in the actual circuit becomes higher than a frequency of a theoretical value calculated by the formula (I) due to an influence of parasitic capacitances of the diodes on the secondary winding side of the transformer T1, and a parasitic capacitance between the primary winding and parasitic capacitances between the secondary windings of the transformer.
FIG. 4 is a circuit configuration diagram of the conventional DC converter in view of the parasitic capacitances. In FIG. 4, Cd1 is a parasitic capacitance of the diode D3, Cd2 is a parasitic capacitance of the diode D4, Cp 1 is a parasitic capacitance between the primary winding P1 of the transformer T1, CS1 is a parasitic capacitance between the secondary winding S1, and CS2 is a parasitic capacitance between the secondary winding S2, respectively. FIG. 5 is a timing chart of signals of each part at no load in the conventional DC converter in view of the parasitic capacitances illustrated in FIG. 4. FIG. 6 is a detail of certain intervals of the timing chart in FIG. 5.
FIG. 7 is an equivalent circuit diagram, in which the parasitic capacitances Cp1, Cd1, Cd2, CS1, and CS2 are concentrated between the primary winding P1 of the transformer T1 and illustrated as one floating capacitance Cp in the conventional DC converter in view of the parasitic capacitances illustrated in FIG. 4.
In the current resonant circuit illustrated in FIG. 1 as described above, the frequency at no load or at light load increases over the frequency of the theoretical value. Therefore, there are advantages of preventing the frequency from increasing more than the theoretical value by changing into an intermittent mode at light load, and reducing power consumption due to intermittent oscillation.